\ Overclock a F051 board to 96 Mhz by terry Porter, based on work by kfoltman May 2016
\ This is a 12 x increase over the standard 8MHz internal RC clock used by Mecrisp-Stellaris, so everything is 12 times faster.
\ Works on a STM32F0 Discovery board using the 8Mhz Xtal via the SWD programmer chip
\ Run the "96mhz" word when this file is loaded

: 96mhz

 \ Set flash wait states to 2, the flash can't run faster than 35MHz ? )
 FLASH_ACR @
 %1111 bic 2 or
 FLASH_ACR !

 \ Enable HSE oscillator  
 1 16 lshift RCC_CR bis!
 BEGIN RCC_CR @ not 1 17 lshift and 0 = UNTIL

 \ Set PLL multiplication factor to 12, clock is 8MHz xtal derived MCO system clock from the SWD programmer
 %1010 18 lshift	\ input x12 = 96 Mhz
 $10000 or		\ PLL SRC = HSE undivided 
 RCC_CFGR !

 \ Enable PLL
 1 24 lshift RCC_CR bis!

 \ Wait for PLL to stabilise
 BEGIN RCC_CR @ not 1 25 lshift and 0 = UNTIL

 \ Switch to HSE, set APB1 and APB2
 RCC_CFGR @
 %11 bic
 %10 or
 %100 11 lshift or	\ APB2CLK = HCLK
 %100 8 lshift or	\ APB1CLK = half HCLK
 RCC_CFGR ! 

 \ Wait for clock source to stabilize
 BEGIN RCC_CFGR @ 2 rshift 3 and %10 = UNTIL

 \ Update the Baud Rate Register so the serial comms is still 115200 baud.  
 416 USART1_BRR !  ( for 96 Mhz )


 \ Optional monitor the MCO frequency on GPIOA-8 with a scope or frequency counter. It will be half the 96 Mhz clock frequency
    %10  16 lshift GPIOA_MODER bis!         \ GPIOA_MODER8  SF1
    %111  24 lshift RCC_CFGR bis!	    \ MCO: Microcontroller clock output: 111: PLL clock selected
    %11  16 lshift GPIOA_OSPEEDR bis!       \ GPIOA_OSPEEDR8 hi speed
 
;