.. index:: stm32-gotchas
 
.. _stm32-gotchas:
 
.. Created stm32-gotchas.rst: Fri 12 Aug 2022 07:50:35 AEST 
.. Full Path: /home/tp/mecrisp-unofficial-doc/stm32-gotchas.rst 
.. Author Copyright 2022 by t.j.porter <techman001@protonmail.com> 
.. Made by /home/tp/projects/scripts/makerst.sh -->/usr/local/bin/makerst 
.. license: MIT, please see COPYING 
 
Stm32 Gotchas
=============

See this link of issues from the STM32 forum at community.st.com : https://community.st.com/s/topic/0TO0X000000BSqSWAW/stm32-mcus

List
----
http://efton.sk/STM32/gotcha/index.htm
::

    Peripheral clock must be enabled in RCC (else registers cannot be written and read as 0)
    Timers' clock is 2x APB clock, if APB divider > 1
    Advanced timers (TIM1, TIM8, ...), to enable output, need to set TIMx_BDTR.MOE
    Debugging is intrusive (e.g. UART/SPI Rx may not work when debugging)
    'F4/'F2 CCM RAM is not good for DMA nor for bit-banding, nor for code
    RTC seemingly does not run if only time is read
    Interrupt called without reason (late interrupt source clear)
    Timer does not work if ARR=0
    TIMx->SR &= ~TIM_SR_flag results in lost interrupts (don't RMW or bit-band on status registers)
    Strange behaviour after increasing system clock frequency (FLASH latency has to follow system clock)
    DAC output does not go rail-to-rail and the output buffer makes it worse
    UART parity bit missing as it counts up to data bits
    Delay is 1ms longer than required (SW/library, not STM32-specific)
    GPIO is not toggling at a rate promised by datasheet
    Timer appears to run slower then is set (unrealistically high interrupt rate)
    Interrupt does not fire - some troubleshooting hints
    Program freezes after enabling an interrupt
    ADC readings not as expected because of high signal impedance
    Debugger keeps jumping into interrupt when single stepping on 'F746
    NDTR problematic when DMA used as Rx FIFO
    SPI master NSS unusable
    Writing one byte to SPI transmits two bytes (because of data packing)
    STM32 hangs in UART interrupt if Rx overrun is not handled
    UART Rx stops working (Rx overrun revisited)
    STM32 are not microcontrollers, but SoC causing various timing-related issues
    Don't use printf() in interrupt or any other lengthy operation
    In 'F4, after enabling backup domain access in PWR, wait before accessing RCC_BDCR or BKPSRAM
    SPI master does not work as NSS switches it to slave
    Processor (and debugger) hangs while debugging OTG USB Host
    Only DMA2 can be used to transfer to/from GPIO in 'F4 and 'F2/'F7
    Timer - if compare is enabled, setting CCRx > ARR still causes interrupts and DMA and TRGO
    SPI generates too many clocks while Rx in Bidir more, and in Rx-only mode
    Smaller packages require port remapping for certain functions namely the USB pins PA11 PA12 on 'F042 in TSSOP20
    ADC in 'L47x/48x has an extra switch in GPIOx_ASCR
    'F1 don't have the GPIO AF matrix unlike all other STM32 families
    Peripherals don't have unique AF number in GPIO matrix they do in 'L1 and mostly do in 'F2/'F4/'F7
    GPIO pin input state can still be read, if it's set to Out or AF and EXTI works, too
    Analog switch voltage booster (for ADC and other) to be switched on at lower VDD on certain STM32
    Software or watchdog reset does not work if NRST is pulled-up hard externally
    First TIM period is too short, prescaler does not work - PSC is preloaded; and so is RCR
    One TIM period is too long/one PWM pulse is shorter/longer than expected - use preload when needed
    First TIM Update ("PeriodElapsed") interrupt fires immediately after configuration when using Cube/SPL
    No bit-banding in Cortex-M0/M0+ but not in Cortex-M7 either
    Some STM32 models after first programming don't run and need power-on reset (AN2606 pattern6)
    Not only frequency but also VOS setting implies FLASH waitstates
    Some pins on my Disco/Nucleo/EVAL board don't work as expected
    TIMx_CHxN is not inverted if TIMx_CHx is not enabled
    TIMx_CHxN cannot be used for input capture
    F3 CCM RAM can't be used for DMA but it can be used for code
    In 'F4 CRC, data are ignored if written too soon after reset
    Not all TIM_CHx are created equal
    TIM - in Encoder mode, prescaler must be 0 (otherwise the counted value is nonsense)
    TIM does not run if ARR was changed from 0 to nonzero due to ARR preload
    In 'F1, RDP also sets write protection on first sectors
    'F2/'F4/'F7/'H7 unreliable at higher frequencies due to incorrect VCAP capacitor
    Internal temperature sensor on ADC indicates surprisingly high temperature but it's most probably correct
    'H7 lifetime may be surprisingly short at elevated working temperatures
    Changing clock frequency requires careful readjustment of peripherals
    PF4 on 'F303 does not work because it's missing on 'F303RD/E
    TIM DMA burst (DMAR/DCR) does not work properly if TIMx_DMAR observed in debugger
    In 'F42x/43x, erase sector does not work due to confusing sector numbering
    Backup domain is not reset by setting RCC_BDCR.BDRST unless PWR_CR.DBP is set, too
    Compatibility within the Value Line (0-ending) models
    Standard C library function does not work not STM32-specific
    Standard C library function (e.g. printf()) fails in interrupt or RTOS not STM32-specific
    SPI master Tx outputs 16 clocks, even if its Data Size set to 8 bit keyword: data packing
    Where are GPIO AF numbers given for individual pins? And where are the NVIC registers described?
    SPI_SR.BSY is unusable
    In 'F746/756, ADC triggering from TIM does not work properly but for some cases this can be fixed by switching on DAC
    Pins don't work even if set in GPIO due to nonzero default values in 'L0/'L4/'Gx/'H7 GPIOx_MODER
    RTC does not work because of RCC_APBxENR.RTCAPBEN bit in some models
    No DMA to/from GPIO in 'L0/'G0 i.e. where the Cortex-M0+ core is used
    Always read the Errata and not only those directly given for your STM32 model
    Write Protection (WRP) granularity may be non-uniform in large-FLASH 'F1/'F0/'F3
    Unexpected ETH interrupts after longer uptime due to MAC management counters interrupts being enabled by default
    RTC digital calibration does not apply to wakeup period with a specific wakeup source selection
    ETH does not work with certain APB2 clock settings due to internal delays between modules
    Using TIM input channel filter may produce confusing results if fed with periodic signal
    If TIM is set to downcounter, 0% PWM is not possible
    When processor stopped in debugger, peripherals and DMA if used by those peripherals keep running
    Crash due to stack content getting corrupted DMA writes to buffer improperly allocated on stack

    Peripheral clock must be enabled in RCC (else registers cannot be written and read as 0)
    Timers' clock is 2x APB clock, if APB divider > 1
    Advanced timers (TIM1, TIM8, ...), to enable output, need to set TIMx_BDTR.MOE
    Debugging is intrusive (e.g. UART/SPI Rx may not work when debugging)
    'F4/'F2 CCM RAM is not good for DMA nor for bit-banding, nor for code
    RTC seemingly does not run if only time is read
    Interrupt called without reason (late interrupt source clear)
    Timer does not work if ARR=0
    TIMx->SR &= ~TIM_SR_flag results in lost interrupts (don't RMW or bit-band on status registers)
    Strange behaviour after increasing system clock frequency (FLASH latency has to follow system clock)
    DAC output does not go rail-to-rail and the output buffer makes it worse
    UART parity bit missing as it counts up to data bits
    Delay is 1ms longer than required (SW/library, not STM32-specific)
    GPIO is not toggling at a rate promised by datasheet
    Timer appears to run slower then is set (unrealistically high interrupt rate)
    Interrupt does not fire - some troubleshooting hints
    Program freezes after enabling an interrupt
    ADC readings not as expected because of high signal impedance
    Debugger keeps jumping into interrupt when single stepping on 'F746
    NDTR problematic when DMA used as Rx FIFO
    SPI master NSS unusable
    Writing one byte to SPI transmits two bytes (because of data packing)
    STM32 hangs in UART interrupt if Rx overrun is not handled
    UART Rx stops working (Rx overrun revisited)
    STM32 are not microcontrollers, but SoC causing various timing-related issues
    Don't use printf() in interrupt or any other lengthy operation
    In 'F4, after enabling backup domain access in PWR, wait before accessing RCC_BDCR or BKPSRAM
    SPI master does not work as NSS switches it to slave
    Processor (and debugger) hangs while debugging OTG USB Host
    Only DMA2 can be used to transfer to/from GPIO in 'F4 and 'F2/'F7
    Timer - if compare is enabled, setting CCRx > ARR still causes interrupts and DMA and TRGO
    SPI generates too many clocks while Rx in Bidir more, and in Rx-only mode
    Smaller packages require port remapping for certain functions namely the USB pins PA11 PA12 on 'F042 in TSSOP20
    ADC in 'L47x/48x has an extra switch in GPIOx_ASCR
    'F1 don't have the GPIO AF matrix unlike all other STM32 families
    Peripherals don't have unique AF number in GPIO matrix they do in 'L1 and mostly do in 'F2/'F4/'F7
    GPIO pin input state can still be read, if it's set to Out or AF and EXTI works, too
    Analog switch voltage booster (for ADC and other) to be switched on at lower VDD on certain STM32
    Software or watchdog reset does not work if NRST is pulled-up hard externally
    First TIM period is too short, prescaler does not work - PSC is preloaded; and so is RCR
    One TIM period is too long/one PWM pulse is shorter/longer than expected - use preload when needed
    First TIM Update ("PeriodElapsed") interrupt fires immediately after configuration when using Cube/SPL
    No bit-banding in Cortex-M0/M0+ but not in Cortex-M7 either
    Some STM32 models after first programming don't run and need power-on reset (AN2606 pattern6)
    Not only frequency but also VOS setting implies FLASH waitstates
    Some pins on my Disco/Nucleo/EVAL board don't work as expected
    TIMx_CHxN is not inverted if TIMx_CHx is not enabled
    TIMx_CHxN cannot be used for input capture
    F3 CCM RAM can't be used for DMA but it can be used for code
    In 'F4 CRC, data are ignored if written too soon after reset
    Not all TIM_CHx are created equal
    TIM - in Encoder mode, prescaler must be 0 (otherwise the counted value is nonsense)
    TIM does not run if ARR was changed from 0 to nonzero due to ARR preload
    In 'F1, RDP also sets write protection on first sectors
    'F2/'F4/'F7/'H7 unreliable at higher frequencies due to incorrect VCAP capacitor
    Internal temperature sensor on ADC indicates surprisingly high temperature but it's most probably correct
    'H7 lifetime may be surprisingly short at elevated working temperatures
    Changing clock frequency requires careful readjustment of peripherals
    PF4 on 'F303 does not work because it's missing on 'F303RD/E
    TIM DMA burst (DMAR/DCR) does not work properly if TIMx_DMAR observed in debugger
    In 'F42x/43x, erase sector does not work due to confusing sector numbering
    Backup domain is not reset by setting RCC_BDCR.BDRST unless PWR_CR.DBP is set, too
    Compatibility within the Value Line (0-ending) models
    Standard C library function does not work not STM32-specific
    Standard C library function (e.g. printf()) fails in interrupt or RTOS not STM32-specific
    SPI master Tx outputs 16 clocks, even if its Data Size set to 8 bit keyword: data packing
    Where are GPIO AF numbers given for individual pins? And where are the NVIC registers described?
    SPI_SR.BSY is unusable
    In 'F746/756, ADC triggering from TIM does not work properly but for some cases this can be fixed by switching on DAC
    Pins don't work even if set in GPIO due to nonzero default values in 'L0/'L4/'Gx/'H7 GPIOx_MODER
    RTC does not work because of RCC_APBxENR.RTCAPBEN bit in some models
    No DMA to/from GPIO in 'L0/'G0 i.e. where the Cortex-M0+ core is used
    Always read the Errata and not only those directly given for your STM32 model
    Write Protection (WRP) granularity may be non-uniform in large-FLASH 'F1/'F0/'F3
    Unexpected ETH interrupts after longer uptime due to MAC management counters interrupts being enabled by default
    RTC digital calibration does not apply to wakeup period with a specific wakeup source selection
    ETH does not work with certain APB2 clock settings due to internal delays between modules
    Using TIM input channel filter may produce confusing results if fed with periodic signal
    If TIM is set to downcounter, 0% PWM is not possible
    When processor stopped in debugger, peripherals and DMA if used by those peripherals keep running
    Crash due to stack content getting corrupted DMA writes to buffer improperly allocated on stack
    On the RTC readout lock mechanism and its deficiencies
    Cannot access BKPSRAM in CubeProgrammer unless register values are manipulated
    GPIO pin does not output enough current if set to low GPIO_OSPEEDR setting
    Not all GPIO pins are created equal e.g. PA10/PB12 pullup/down in 'F2/'F4/'F7 is only 10kΩ
    'G0/'G4 USB-C Dead Battery conundrum pin influenced by other pin, unexpected pulldowns
    UART Tx is not driven immediately after enabling UART and UART_BRR has to be set properly
    The Y2k38 bug not STM32-specific
    How to set TRGO in TIM16/TIM17? Also, TIM channel needs output enabled if controls another module, e.g. ADC.
    Some time after peripheral (TIM, SPI, etc.) function finished, pin state changes resulting in unwanted clock/transition
    Some interrupts cannot be disabled, and attempts to do so may lead to HardFault e.g. SysTick
    Peripheral connected to other than a single pin in GPIO AF matrix #GPIO_is_poorly_documented
    Timers don't support DIR/STEP encoders except in 'G4 - but a trick may exist
    'G4 lifetime may be surprisingly short at elevated working temperatures
    How to achieve consistent RTC readout?
    TCM don't support highest clock frequencies in 'H723/725

    Peripheral clock must be enabled in RCC (else registers cannot be written and read as 0)
    Timers' clock is 2x APB clock, if APB divider > 1
    Advanced timers (TIM1, TIM8, ...), to enable output, need to set TIMx_BDTR.MOE
    Debugging is intrusive (e.g. UART/SPI Rx may not work when debugging)
    'F4/'F2 CCM RAM is not good for DMA nor for bit-banding, nor for code
    RTC seemingly does not run if only time is read
    Interrupt called without reason (late interrupt source clear)
    Timer does not work if ARR=0
    TIMx->SR &= ~TIM_SR_flag results in lost interrupts (don't RMW or bit-band on status registers)
    Strange behaviour after increasing system clock frequency (FLASH latency has to follow system clock)
    DAC output does not go rail-to-rail and the output buffer makes it worse
    UART parity bit missing as it counts up to data bits
    Delay is 1ms longer than required (SW/library, not STM32-specific)
    GPIO is not toggling at a rate promised by datasheet
    Timer appears to run slower then is set (unrealistically high interrupt rate)
    Interrupt does not fire - some troubleshooting hints
    Program freezes after enabling an interrupt
    ADC readings not as expected because of high signal impedance
    Debugger keeps jumping into interrupt when single stepping on 'F746
    NDTR problematic when DMA used as Rx FIFO
    SPI master NSS unusable
    Writing one byte to SPI transmits two bytes (because of data packing)
    STM32 hangs in UART interrupt if Rx overrun is not handled
    UART Rx stops working (Rx overrun revisited)
    STM32 are not microcontrollers, but SoC causing various timing-related issues
    Don't use printf() in interrupt or any other lengthy operation
    In 'F4, after enabling backup domain access in PWR, wait before accessing RCC_BDCR or BKPSRAM
    SPI master does not work as NSS switches it to slave
    Processor (and debugger) hangs while debugging OTG USB Host
    Only DMA2 can be used to transfer to/from GPIO in 'F4 and 'F2/'F7
    Timer - if compare is enabled, setting CCRx > ARR still causes interrupts and DMA and TRGO
    SPI generates too many clocks while Rx in Bidir more, and in Rx-only mode
    Smaller packages require port remapping for certain functions namely the USB pins PA11 PA12 on 'F042 in TSSOP20
    ADC in 'L47x/48x has an extra switch in GPIOx_ASCR
    'F1 don't have the GPIO AF matrix unlike all other STM32 families
    Peripherals don't have unique AF number in GPIO matrix they do in 'L1 and mostly do in 'F2/'F4/'F7
    GPIO pin input state can still be read, if it's set to Out or AF and EXTI works, too
    Analog switch voltage booster (for ADC and other) to be switched on at lower VDD on certain STM32
    Software or watchdog reset does not work if NRST is pulled-up hard externally
    First TIM period is too short, prescaler does not work - PSC is preloaded; and so is RCR
    One TIM period is too long/one PWM pulse is shorter/longer than expected - use preload when needed
    First TIM Update ("PeriodElapsed") interrupt fires immediately after configuration when using Cube/SPL
    No bit-banding in Cortex-M0/M0+ but not in Cortex-M7 either
    Some STM32 models after first programming don't run and need power-on reset (AN2606 pattern6)
    Not only frequency but also VOS setting implies FLASH waitstates
    Some pins on my Disco/Nucleo/EVAL board don't work as expected
    TIMx_CHxN is not inverted if TIMx_CHx is not enabled
    TIMx_CHxN cannot be used for input capture
    F3 CCM RAM can't be used for DMA but it can be used for code
    In 'F4 CRC, data are ignored if written too soon after reset
    Not all TIM_CHx are created equal
    TIM - in Encoder mode, prescaler must be 0 (otherwise the counted value is nonsense)
    TIM does not run if ARR was changed from 0 to nonzero due to ARR preload
    In 'F1, RDP also sets write protection on first sectors
    'F2/'F4/'F7/'H7 unreliable at higher frequencies due to incorrect VCAP capacitor
    Internal temperature sensor on ADC indicates surprisingly high temperature but it's most probably correct
    'H7 lifetime may be surprisingly short at elevated working temperatures
    Changing clock frequency requires careful readjustment of peripherals
    PF4 on 'F303 does not work because it's missing on 'F303RD/E
    TIM DMA burst (DMAR/DCR) does not work properly if TIMx_DMAR observed in debugger
    In 'F42x/43x, erase sector does not work due to confusing sector numbering
    Backup domain is not reset by setting RCC_BDCR.BDRST unless PWR_CR.DBP is set, too
    Compatibility within the Value Line (0-ending) models
    Standard C library function does not work not STM32-specific
    Standard C library function (e.g. printf()) fails in interrupt or RTOS not STM32-specific
    SPI master Tx outputs 16 clocks, even if its Data Size set to 8 bit keyword: data packing
    Where are GPIO AF numbers given for individual pins? And where are the NVIC registers described?
    SPI_SR.BSY is unusable
    In 'F746/756, ADC triggering from TIM does not work properly but for some cases this can be fixed by switching on DAC
    Pins don't work even if set in GPIO due to nonzero default values in 'L0/'L4/'Gx/'H7 GPIOx_MODER
    RTC does not work because of RCC_APBxENR.RTCAPBEN bit in some models
    No DMA to/from GPIO in 'L0/'G0 i.e. where the Cortex-M0+ core is used
    Always read the Errata and not only those directly given for your STM32 model
    Write Protection (WRP) granularity may be non-uniform in large-FLASH 'F1/'F0/'F3
    Unexpected ETH interrupts after longer uptime due to MAC management counters interrupts being enabled by default
    RTC digital calibration does not apply to wakeup period with a specific wakeup source selection
    ETH does not work with certain APB2 clock settings due to internal delays between modules
    Using TIM input channel filter may produce confusing results if fed with periodic signal
    If TIM is set to downcounter, 0% PWM is not possible
    When processor stopped in debugger, peripherals and DMA if used by those peripherals keep running
    Crash due to stack content getting corrupted DMA writes to buffer improperly allocated on stack

    Peripheral clock must be enabled in RCC (else registers cannot be written and read as 0)
    Timers' clock is 2x APB clock, if APB divider > 1
    Advanced timers (TIM1, TIM8, ...), to enable output, need to set TIMx_BDTR.MOE
    Debugging is intrusive (e.g. UART/SPI Rx may not work when debugging)
    'F4/'F2 CCM RAM is not good for DMA nor for bit-banding, nor for code
    RTC seemingly does not run if only time is read
    Interrupt called without reason (late interrupt source clear)
    Timer does not work if ARR=0
    TIMx->SR &= ~TIM_SR_flag results in lost interrupts (don't RMW or bit-band on status registers)
    Strange behaviour after increasing system clock frequency (FLASH latency has to follow system clock)
    DAC output does not go rail-to-rail and the output buffer makes it worse
    UART parity bit missing as it counts up to data bits
    Delay is 1ms longer than required (SW/library, not STM32-specific)
    GPIO is not toggling at a rate promised by datasheet
    Timer appears to run slower then is set (unrealistically high interrupt rate)
    Interrupt does not fire - some troubleshooting hints
    Program freezes after enabling an interrupt
    ADC readings not as expected because of high signal impedance
    Debugger keeps jumping into interrupt when single stepping on 'F746
    NDTR problematic when DMA used as Rx FIFO
    SPI master NSS unusable
    Writing one byte to SPI transmits two bytes (because of data packing)
    STM32 hangs in UART interrupt if Rx overrun is not handled
    UART Rx stops working (Rx overrun revisited)
    STM32 are not microcontrollers, but SoC causing various timing-related issues
    Don't use printf() in interrupt or any other lengthy operation
    In 'F4, after enabling backup domain access in PWR, wait before accessing RCC_BDCR or BKPSRAM
    SPI master does not work as NSS switches it to slave
    Processor (and debugger) hangs while debugging OTG USB Host
    Only DMA2 can be used to transfer to/from GPIO in 'F4 and 'F2/'F7
    Timer - if compare is enabled, setting CCRx > ARR still causes interrupts and DMA and TRGO
    SPI generates too many clocks while Rx in Bidir more, and in Rx-only mode
    Smaller packages require port remapping for certain functions namely the USB pins PA11 PA12 on 'F042 in TSSOP20
    ADC in 'L47x/48x has an extra switch in GPIOx_ASCR
    'F1 don't have the GPIO AF matrix unlike all other STM32 families
    Peripherals don't have unique AF number in GPIO matrix they do in 'L1 and mostly do in 'F2/'F4/'F7
    GPIO pin input state can still be read, if it's set to Out or AF and EXTI works, too
    Analog switch voltage booster (for ADC and other) to be switched on at lower VDD on certain STM32
    Software or watchdog reset does not work if NRST is pulled-up hard externally
    First TIM period is too short, prescaler does not work - PSC is preloaded; and so is RCR
    One TIM period is too long/one PWM pulse is shorter/longer than expected - use preload when needed
    First TIM Update ("PeriodElapsed") interrupt fires immediately after configuration when using Cube/SPL
    No bit-banding in Cortex-M0/M0+ but not in Cortex-M7 either
    Some STM32 models after first programming don't run and need power-on reset (AN2606 pattern6)
    Not only frequency but also VOS setting implies FLASH waitstates
    Some pins on my Disco/Nucleo/EVAL board don't work as expected
    TIMx_CHxN is not inverted if TIMx_CHx is not enabled
    TIMx_CHxN cannot be used for input capture
    F3 CCM RAM can't be used for DMA but it can be used for code
    In 'F4 CRC, data are ignored if written too soon after reset
    Not all TIM_CHx are created equal
    TIM - in Encoder mode, prescaler must be 0 (otherwise the counted value is nonsense)
    TIM does not run if ARR was changed from 0 to nonzero due to ARR preload
    In 'F1, RDP also sets write protection on first sectors
    'F2/'F4/'F7/'H7 unreliable at higher frequencies due to incorrect VCAP capacitor
    Internal temperature sensor on ADC indicates surprisingly high temperature but it's most probably correct
    'H7 lifetime may be surprisingly short at elevated working temperatures
    Changing clock frequency requires careful readjustment of peripherals
    PF4 on 'F303 does not work because it's missing on 'F303RD/E
    TIM DMA burst (DMAR/DCR) does not work properly if TIMx_DMAR observed in debugger
    In 'F42x/43x, erase sector does not work due to confusing sector numbering
    Backup domain is not reset by setting RCC_BDCR.BDRST unless PWR_CR.DBP is set, too
    Compatibility within the Value Line (0-ending) models
    Standard C library function does not work not STM32-specific
    Standard C library function (e.g. printf()) fails in interrupt or RTOS not STM32-specific
    SPI master Tx outputs 16 clocks, even if its Data Size set to 8 bit keyword: data packing
    Where are GPIO AF numbers given for individual pins? And where are the NVIC registers described?
    SPI_SR.BSY is unusable
    In 'F746/756, ADC triggering from TIM does not work properly but for some cases this can be fixed by switching on DAC
    Pins don't work even if set in GPIO due to nonzero default values in 'L0/'L4/'Gx/'H7 GPIOx_MODER
    RTC does not work because of RCC_APBxENR.RTCAPBEN bit in some models
    No DMA to/from GPIO in 'L0/'G0 i.e. where the Cortex-M0+ core is used
    Always read the Errata and not only those directly given for your STM32 model
    Write Protection (WRP) granularity may be non-uniform in large-FLASH 'F1/'F0/'F3
    Unexpected ETH interrupts after longer uptime due to MAC management counters interrupts being enabled by default
    RTC digital calibration does not apply to wakeup period with a specific wakeup source selection
    ETH does not work with certain APB2 clock settings due to internal delays between modules
    Using TIM input channel filter may produce confusing results if fed with periodic signal
    If TIM is set to downcounter, 0% PWM is not possible
    When processor stopped in debugger, peripherals and DMA if used by those peripherals keep running
    Crash due to stack content getting corrupted DMA writes to buffer improperly allocated on stack
    On the RTC readout lock mechanism and its deficiencies
    Cannot access BKPSRAM in CubeProgrammer unless register values are manipulated
    GPIO pin does not output enough current if set to low GPIO_OSPEEDR setting
    Not all GPIO pins are created equal e.g. PA10/PB12 pullup/down in 'F2/'F4/'F7 is only 10kΩ
    'G0/'G4 USB-C Dead Battery conundrum pin influenced by other pin, unexpected pulldowns
    UART Tx is not driven immediately after enabling UART and UART_BRR has to be set properly
    The Y2k38 bug not STM32-specific
    How to set TRGO in TIM16/TIM17? Also, TIM channel needs output enabled if controls another module, e.g. ADC.
    Some time after peripheral (TIM, SPI, etc.) function finished, pin state changes resulting in unwanted clock/transition
    Some interrupts cannot be disabled, and attempts to do so may lead to HardFault e.g. SysTick
    Peripheral connected to other than a single pin in GPIO AF matrix #GPIO_is_poorly_documented
    Timers don't support DIR/STEP encoders except in 'G4 - but a trick may exist
    'G4 lifetime may be surprisingly short at elevated working temperatures
    How to achieve consistent RTC readout?
    TCM don't support highest clock frequencies in 'H723/725
    5V-tolerant pins don't always tolerate 5V especially if mcu is powered down
    FLASH is not erased to 0xFF in 'L0 and 'L1 but to 0x00
    FLASH is 0xFF but cannot be written if there's ECC and granule has been already written
    In lower-end 'F0xx, GPIOC/GPIOD don't have AFR[2] registers
    VDDA is pulled high when ADC is enabled if VDDA<2.4V and booster not enabled
    STLink-V3 8MHz MCO output is not derived from crystal partial workaround available
    After being cleared in NVIC outside an ISR, interrupt reappears if pending flag in NVIC is cleared too soon after removing the interrupt source
    USB packet buffer memory in 'F042 is not bytewise writable
    Clicked ETH/USB in CubeIDE/CubeMX, and it does not work
    Bit-banding cannot be used with DMA
    No atomic access through bit-banding to GPIO registers' bits except in 'F1
    Toggling GPIO in 'H7 is slow due to complex bus structure
    PF0/PF1/PC14/PC15 don't work GPIO overriden by oscillator enabled in RCC
    Using interrupt or DMA, only first few data are transmitted correctly due to local variable as buffer - not ST-specific
    Some interrupts invoke incorrect ISR if VTOR is not properly aligned
    After setting GPIOA things stop to work due to overwriting SWD pins settings
    Used this Cube/SPL function and it works weird uninitialized struct as parameter
    Some TIM register fields are not continuous in newer STM32 families
    Incorrect values from internal temperature sensor due to errorneous values in 'G4 datasheet
    RTC loses half a second per powerup/reset Cube bug, fixed
    On the RTC readout lock mechanism and its deficiencies
    Cannot access BKPSRAM in CubeProgrammer unless register values are manipulated
    GPIO pin does not output enough current if set to low GPIO_OSPEEDR setting
    Not all GPIO pins are created equal e.g. PA10/PB12 pullup/down in 'F2/'F4/'F7 is only 10kΩ
    'G0/'G4 USB-C Dead Battery conundrum pin influenced by other pin, unexpected pulldowns
    UART Tx is not driven immediately after enabling UART and UART_BRR has to be set properly
    The Y2k38 bug not STM32-specific
    How to set TRGO in TIM16/TIM17? Also, TIM channel needs output enabled if controls another module, e.g. ADC.
    Some time after peripheral (TIM, SPI, etc.) function finished, pin state changes resulting in unwanted clock/transition
    Some interrupts cannot be disabled, and attempts to do so may lead to HardFault e.g. SysTick
    Peripheral connected to other than a single pin in GPIO AF matrix #GPIO_is_poorly_documented
    Timers don't support DIR/STEP encoders except in 'G4 - but a trick may exist
    'G4 lifetime may be surprisingly short at elevated working temperatures
    How to achieve consistent RTC readout?
    TCM don't support highest clock frequencies in 'H723/725
    5V-tolerant pins don't always tolerate 5V especially if mcu is powered down
    FLASH is not erased to 0xFF in 'L0 and 'L1 but to 0x00
    FLASH is 0xFF but cannot be written if there's ECC and granule has been already written
    In lower-end 'F0xx, GPIOC/GPIOD don't have AFR[2] registers
    VDDA is pulled high when ADC is enabled if VDDA<2.4V and booster not enabled
    STLink-V3 8MHz MCO output is not derived from crystal partial workaround available
    After being cleared in NVIC outside an ISR, interrupt reappears if pending flag in NVIC is cleared too soon after removing the interrupt source
    USB packet buffer memory in 'F042 is not bytewise writable
    Clicked ETH/USB in CubeIDE/CubeMX, and it does not work
    Bit-banding cannot be used with DMA
    No atomic access through bit-banding to GPIO registers' bits except in 'F1
    Toggling GPIO in 'H7 is slow due to complex bus structure
    PF0/PF1/PC14/PC15 don't work GPIO overriden by oscillator enabled in RCC
    Using interrupt or DMA, only first few data are transmitted correctly due to local variable as buffer - not ST-specific
    Some interrupts invoke incorrect ISR if VTOR is not properly aligned
    After setting GPIOA things stop to work due to overwriting SWD pins settings
    Used this Cube/SPL function and it works weird uninitialized struct as parameter
    Some TIM register fields are not continuous in newer STM32 families
    Incorrect values from internal temperature sensor due to errorneous values in 'G4 datasheet
    RTC loses half a second per powerup/reset Cube bug, fixed
    5V-tolerant pins don't always tolerate 5V especially if mcu is powered down
    FLASH is not erased to 0xFF in 'L0 and 'L1 but to 0x00
    FLASH is 0xFF but cannot be written if there's ECC and granule has been already written
    In lower-end 'F0xx, GPIOC/GPIOD don't have AFR[2] registers
    VDDA is pulled high when ADC is enabled if VDDA<2.4V and booster not enabled
    STLink-V3 8MHz MCO output is not derived from crystal partial workaround available
    After being cleared in NVIC outside an ISR, interrupt reappears if pending flag in NVIC is cleared too soon after removing the interrupt source
    USB packet buffer memory in 'F042 is not bytewise writable
    Clicked ETH/USB in CubeIDE/CubeMX, and it does not work
    Bit-banding cannot be used with DMA
    No atomic access through bit-banding to GPIO registers' bits except in 'F1
    Toggling GPIO in 'H7 is slow due to complex bus structure
    PF0/PF1/PC14/PC15 don't work GPIO overriden by oscillator enabled in RCC
    Using interrupt or DMA, only first few data are transmitted correctly due to local variable as buffer - not ST-specific
    Some interrupts invoke incorrect ISR if VTOR is not properly aligned
    After setting GPIOA things stop to work due to overwriting SWD pins settings
    Used this Cube/SPL function and it works weird uninitialized struct as parameter
    Some TIM register fields are not continuous in newer STM32 families
    Incorrect values from internal temperature sensor due to errorneous values in 'G4 datasheet
    RTC loses half a second per powerup/reset Cube bug, fixed
    On the RTC readout lock mechanism and its deficiencies
    Cannot access BKPSRAM in CubeProgrammer unless register values are manipulated
    GPIO pin does not output enough current if set to low GPIO_OSPEEDR setting
    Not all GPIO pins are created equal e.g. PA10/PB12 pullup/down in 'F2/'F4/'F7 is only 10kΩ
    'G0/'G4 USB-C Dead Battery conundrum pin influenced by other pin, unexpected pulldowns
    UART Tx is not driven immediately after enabling UART and UART_BRR has to be set properly
    The Y2k38 bug not STM32-specific
    How to set TRGO in TIM16/TIM17? Also, TIM channel needs output enabled if controls another module, e.g. ADC.
    Some time after peripheral (TIM, SPI, etc.) function finished, pin state changes resulting in unwanted clock/transition
    Some interrupts cannot be disabled, and attempts to do so may lead to HardFault e.g. SysTick
    Peripheral connected to other than a single pin in GPIO AF matrix #GPIO_is_poorly_documented
    Timers don't support DIR/STEP encoders except in 'G4 - but a trick may exist
    'G4 lifetime may be surprisingly short at elevated working temperatures
    How to achieve consistent RTC readout?
    TCM don't support highest clock frequencies in 'H723/725
    5V-tolerant pins don't always tolerate 5V especially if mcu is powered down
    FLASH is not erased to 0xFF in 'L0 and 'L1 but to 0x00
    FLASH is 0xFF but cannot be written if there's ECC and granule has been already written
    In lower-end 'F0xx, GPIOC/GPIOD don't have AFR[2] registers
    VDDA is pulled high when ADC is enabled if VDDA<2.4V and booster not enabled
    STLink-V3 8MHz MCO output is not derived from crystal partial workaround available
    After being cleared in NVIC outside an ISR, interrupt reappears if pending flag in NVIC is cleared too soon after removing the interrupt source
    USB packet buffer memory in 'F042 is not bytewise writable
    Clicked ETH/USB in CubeIDE/CubeMX, and it does not work
    Bit-banding cannot be used with DMA
    No atomic access through bit-banding to GPIO registers' bits except in 'F1
    Toggling GPIO in 'H7 is slow due to complex bus structure
    PF0/PF1/PC14/PC15 don't work GPIO overriden by oscillator enabled in RCC
    Using interrupt or DMA, only first few data are transmitted correctly due to local variable as buffer - not ST-specific
    Some interrupts invoke incorrect ISR if VTOR is not properly aligned
    After setting GPIOA things stop to work due to overwriting SWD pins settings
    Used this Cube/SPL function and it works weird uninitialized struct as parameter
    Some TIM register fields are not continuous in newer STM32 families
    Incorrect values from internal temperature sensor due to errorneous values in 'G4 datasheet
    RTC loses half a second per powerup/reset Cube bug, fixed