.. index:: STM32G431xx .. _STM32G431xx: .. Created STM32G431xx.rst: Mon 14 Nov 2022 12:39:50 AEDT .. Full Path: /home/tp/mecrisp-unofficial-doc/STM32G431xx.rst .. Author Copyright 2022 by t.j.porter .. Made by /home/tp/projects/scripts/makerst.sh -->/usr/local/bin/makerst .. license: MIT, please see COPYING STM32G431xx =========== .. seealso:: :ref:`SVD2DB V1 Page` The STM32G431xx chip. It's very cool with four OP amps etc. * Database: (UnGzip and rename/symlink to svd2db.db) https://sourceforge.net/projects/mecrisp-stellaris-folkdoc/files/svd2db-STM32G431xx.db.gz * Viewer/Searcher: https://sourceforge.net/projects/mecrisp-stellaris-folkdoc/files/readdb * Viewer Doc: https://sourceforge.net/projects/mecrisp-stellaris-folkdoc/files/svd2db-v1.pdf Examples -------- * Ar = Access Rights * Bw = BitWidth * Bo = BitOffset * Address is absolute Peripherals ^^^^^^^^^^^ Check out all the cool peripherals! :: ./readdb -L ADC1 DMA2 GPIOG SAI TIM4 ADC12_Common DMAMUX I2C1 SCB TIM6 ADC2 EXTI I2C2 SCB_ACTLR TIM7 ADC345_Common FDCAN I2C3 SPI1 TIM8 AES FDCAN1 IWDG SPI2 UART4 COMP FLASH LPTIMER1 SPI3 UCPD1 CORDIC FMAC LPUART1 STK USART1 CRC FPU MPU SYSCFG USART2 CRS FPU_CPACR NVIC TAMP USART3 DAC1 GPIOA NVIC_STIR TIM1 USB_FS_device DAC2 GPIOB OPAMP TIM15 VREFBUF DAC3 GPIOC PWR TIM16 WWDG DAC4 GPIOD RCC TIM17 DBGMCU GPIOE RNG TIM2 DMA1 GPIOF RTC TIM3 OP-AMP1 ^^^^^^^ Note the 5 bit Gain and Trim settings! :: % ./readdb -p opamp -b opamp1 -T name address ar bw bo description ------------------------------ ---------- -- -- -- -------------------------------------------------- OPAMP_OPAMP1_CSR 0x40010300 -- -- 98 Reset:0x00000000 Address: 0x40010300 OPAMP_OPAMP1_CSR_CALON 0x40010300 rw 1 11 CALON OPAMP_OPAMP1_CSR_CALOUT 0x40010300 rw 1 30 CALOUT OPAMP_OPAMP1_CSR_CALSEL 0x40010300 rw 2 12 CALSEL OPAMP_OPAMP1_CSR_FORCE_VP 0x40010300 rw 1 1 FORCE_VP OPAMP_OPAMP1_CSR_LOCK 0x40010300 rw 1 31 LOCK OPAMP_OPAMP1_CSR_OPAEN 0x40010300 rw 1 0 Operational amplifier Enable OPAMP_OPAMP1_CSR_OPAHSM 0x40010300 rw 1 7 OPAHSM OPAMP_OPAMP1_CSR_OPAINTOEN 0x40010300 rw 1 8 OPAINTOEN OPAMP_OPAMP1_CSR_PGA_GAIN 0x40010300 rw 5 14 PGA_GAIN OPAMP_OPAMP1_CSR_TRIMOFFSETN 0x40010300 rw 5 24 TRIMOFFSETN OPAMP_OPAMP1_CSR_TRIMOFFSETP 0x40010300 rw 5 19 TRIMOFFSETP OPAMP_OPAMP1_CSR_USERTRIM 0x40010300 rw 1 4 USERTRIM OPAMP_OPAMP1_CSR_VM_SEL 0x40010300 rw 2 5 VM_SEL OPAMP_OPAMP1_CSR_VP_SEL 0x40010300 rw 2 2 VP_SEL OPAMP_OPAMP1_TCMR 0x40010318 -- -- 98 Reset:0x00000000 Address: 0x40010318 OPAMP_OPAMP1_TCMR_LOCK 0x40010318 rw 1 31 LOCK OPAMP_OPAMP1_TCMR_T1CM_EN 0x40010318 rw 1 3 T1CM_EN OPAMP_OPAMP1_TCMR_T20CM_EN 0x40010318 rw 1 5 T20CM_EN OPAMP_OPAMP1_TCMR_T8CM_EN 0x40010318 rw 1 4 T8CM_EN OPAMP_OPAMP1_TCMR_VMS_SEL 0x40010318 rw 1 0 VMS_SEL OPAMP_OPAMP1_TCMR_VPS_SEL 0x40010318 rw 2 1 VPS_SEL Serial Audio Interface Peripheral ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Wow. I never realised that Serial audio was so complex. :: ./readdb -p sai -T name address ar bw bo description ------------------------------ ---------- -- -- -- -------------------------------------------------- SAI NULL -- -- 99 STM32G431xx: Serial audio interface Peripheral SAI_ACLRFR 0x4001541C -- -- 98 Reset:0x00000000 Address: 0x4001541C SAI_ACLRFR_CAFSDET 0x4001541C rw 1 5 Clear anticipated frame synchronization SAI_ACLRFR_CNRDY 0x4001541C rw 1 4 Clear codec not ready flag SAI_ACLRFR_LFSDET 0x4001541C rw 1 6 Clear late frame synchronization det SAI_ACLRFR_MUTEDET 0x4001541C rw 1 1 Mute detection flag SAI_ACLRFR_OVRUDR 0x4001541C rw 1 0 Clear overrun / underrun SAI_ACLRFR_WCKCFG 0x4001541C rw 1 2 Clear wrong clock configuration flag SAI_ACR1 0x40015404 -- -- 98 Reset:0x00000040 Address: 0x40015404 SAI_ACR1_CKSTR 0x40015404 rw 1 9 Clock strobing edge SAI_ACR1_DMAEN 0x40015404 rw 1 17 DMA enable SAI_ACR1_DS 0x40015404 rw 3 5 Data size SAI_ACR1_LSBFIRST 0x40015404 rw 1 8 Least significant bit first SAI_ACR1_MCJDIV 0x40015404 rw 6 20 Master clock divider SAI_ACR1_MCKEN 0x40015404 rw 1 27 MCKEN SAI_ACR1_MODE 0x40015404 rw 2 0 Audio block mode SAI_ACR1_MONO 0x40015404 rw 1 12 Mono mode SAI_ACR1_NODIV 0x40015404 rw 1 19 No divider SAI_ACR1_OSR 0x40015404 rw 1 26 OSR SAI_ACR1_OutDri 0x40015404 rw 1 13 Output drive SAI_ACR1_PRTCFG 0x40015404 rw 2 2 Protocol configuration SAI_ACR1_SAIAEN 0x40015404 rw 1 16 Audio block A enable SAI_ACR1_SYNCEN 0x40015404 rw 2 10 Synchronization enable SAI_ACR2 0x40015408 -- -- 98 Reset:0x00000000 Address: 0x40015408 SAI_ACR2_COMP 0x40015408 rw 2 14 Companding mode SAI_ACR2_CPL 0x40015408 rw 1 13 Complement bit SAI_ACR2_FFLUS 0x40015408 rw 1 3 FIFO flush SAI_ACR2_FTH 0x40015408 rw 3 0 FIFO threshold SAI_ACR2_MUTE 0x40015408 rw 1 5 Mute SAI_ACR2_MUTECN 0x40015408 rw 6 7 Mute counter SAI_ACR2_MUTEVAL 0x40015408 rw 1 6 Mute value SAI_ACR2_TRIS 0x40015408 rw 1 4 Tristate management on data line SAI_ADR 0x40015420 -- -- 98 Reset:0x00000000 Address: 0x40015420 SAI_ADR_DATA 0x40015420 rw 32 0 Data SAI_AFRCR 0x4001540C -- -- 98 Reset:0x00000007 Address: 0x4001540C SAI_AFRCR_FRL 0x4001540C rw 8 0 Frame length SAI_AFRCR_FSALL 0x4001540C rw 7 8 Frame synchronization active level l SAI_AFRCR_FSDEF 0x4001540C rw 1 16 Frame synchronization definition SAI_AFRCR_FSOFF 0x4001540C rw 1 18 Frame synchronization offset SAI_AFRCR_FSPOL 0x4001540C rw 1 17 Frame synchronization polarity SAI_AIM 0x40015414 -- -- 98 Reset:0x00000000 Address: 0x40015414 SAI_AIM_AFSDETIE 0x40015414 rw 1 5 Anticipated frame synchronization de SAI_AIM_CNRDYIE 0x40015414 rw 1 4 Codec not ready interrupt enable SAI_AIM_FREQIE 0x40015414 rw 1 3 FIFO request interrupt enable SAI_AIM_LFSDET 0x40015414 rw 1 6 Late frame synchronization detection SAI_AIM_MUTEDET 0x40015414 rw 1 1 Mute detection interrupt enable SAI_AIM_OVRUDRIE 0x40015414 rw 1 0 Overrun/underrun interrupt enable SAI_AIM_WCKCFG 0x40015414 rw 1 2 Wrong clock configuration interrupt SAI_ASLOTR 0x40015410 -- -- 98 Reset:0x00000000 Address: 0x40015410 SAI_ASLOTR_FBOFF 0x40015410 rw 5 0 First bit offset SAI_ASLOTR_NBSLOT 0x40015410 rw 4 8 Number of slots in an audio frame SAI_ASLOTR_SLOTEN 0x40015410 rw 16 16 Slot enable SAI_ASLOTR_SLOTSZ 0x40015410 rw 2 6 Slot size SAI_ASR 0x40015418 -- -- 98 Reset:0x00000000 Address: 0x40015418 SAI_ASR_AFSDET 0x40015418 rw 1 5 Anticipated frame synchronization de SAI_ASR_CNRDY 0x40015418 rw 1 4 Codec not ready SAI_ASR_FLVL 0x40015418 rw 3 16 FIFO level threshold SAI_ASR_FREQ 0x40015418 rw 1 3 FIFO request SAI_ASR_LFSDET 0x40015418 rw 1 6 Late frame synchronization detection SAI_ASR_MUTEDET 0x40015418 rw 1 1 Mute detection SAI_ASR_OVRUDR 0x40015418 rw 1 0 Overrun / underrun SAI_ASR_WCKCFG 0x40015418 rw 1 2 Wrong clock configuration flag. This bit SAI_BCLRFR 0x4001543C -- -- 98 Reset:0x00000000 Address: 0x4001543C SAI_BCLRFR_CAFSDET 0x4001543C wo 1 5 Clear anticipated frame synchronization SAI_BCLRFR_CNRDY 0x4001543C wo 1 4 Clear codec not ready flag SAI_BCLRFR_LFSDET 0x4001543C wo 1 6 Clear late frame synchronization det SAI_BCLRFR_MUTEDET 0x4001543C wo 1 1 Mute detection flag SAI_BCLRFR_OVRUDR 0x4001543C wo 1 0 Clear overrun / underrun SAI_BCLRFR_WCKCFG 0x4001543C wo 1 2 Clear wrong clock configuration flag SAI_BCR1 0x40015424 -- -- 98 Reset:0x00000040 Address: 0x40015424 SAI_BCR1_CKSTR 0x40015424 rw 1 9 Clock strobing edge SAI_BCR1_DMAEN 0x40015424 rw 1 17 DMA enable SAI_BCR1_DS 0x40015424 rw 3 5 Data size SAI_BCR1_LSBFIRST 0x40015424 rw 1 8 Least significant bit first SAI_BCR1_MCJDIV 0x40015424 rw 6 20 Master clock divider SAI_BCR1_MCKEN 0x40015424 rw 1 27 MCKEN SAI_BCR1_MODE 0x40015424 rw 2 0 Audio block mode SAI_BCR1_MONO 0x40015424 rw 1 12 Mono mode SAI_BCR1_NODIV 0x40015424 rw 1 19 No divider SAI_BCR1_OSR 0x40015424 rw 1 26 OSR SAI_BCR1_OutDri 0x40015424 rw 1 13 Output drive SAI_BCR1_PRTCFG 0x40015424 rw 2 2 Protocol configuration SAI_BCR1_SAIBEN 0x40015424 rw 1 16 Audio block B enable SAI_BCR1_SYNCEN 0x40015424 rw 2 10 Synchronization enable SAI_BCR2 0x40015428 -- -- 98 Reset:0x00000000 Address: 0x40015428 SAI_BCR2_COMP 0x40015428 rw 2 14 Companding mode SAI_BCR2_CPL 0x40015428 rw 1 13 Complement bit SAI_BCR2_FFLUS 0x40015428 rw 1 3 FIFO flush SAI_BCR2_FTH 0x40015428 rw 3 0 FIFO threshold SAI_BCR2_MUTE 0x40015428 rw 1 5 Mute SAI_BCR2_MUTECN 0x40015428 rw 6 7 Mute counter SAI_BCR2_MUTEVAL 0x40015428 rw 1 6 Mute value SAI_BCR2_TRIS 0x40015428 rw 1 4 Tristate management on data line SAI_BDR 0x40015440 -- -- 98 Reset:0x00000000 Address: 0x40015440 SAI_BDR_DATA 0x40015440 rw 32 0 Data SAI_BFRCR 0x4001542C -- -- 98 Reset:0x00000007 Address: 0x4001542C SAI_BFRCR_FRL 0x4001542C rw 8 0 Frame length SAI_BFRCR_FSALL 0x4001542C rw 7 8 Frame synchronization active level l SAI_BFRCR_FSDEF 0x4001542C rw 1 16 Frame synchronization definition SAI_BFRCR_FSOFF 0x4001542C rw 1 18 Frame synchronization offset SAI_BFRCR_FSPOL 0x4001542C rw 1 17 Frame synchronization polarity SAI_BIM 0x40015434 -- -- 98 Reset:0x00000000 Address: 0x40015434 SAI_BIM_AFSDETIE 0x40015434 rw 1 5 Anticipated frame synchronization de SAI_BIM_CNRDYIE 0x40015434 rw 1 4 Codec not ready interrupt enable SAI_BIM_FREQIE 0x40015434 rw 1 3 FIFO request interrupt enable SAI_BIM_LFSDETIE 0x40015434 rw 1 6 Late frame synchronization detection SAI_BIM_MUTEDET 0x40015434 rw 1 1 Mute detection interrupt enable SAI_BIM_OVRUDRIE 0x40015434 rw 1 0 Overrun/underrun interrupt enable SAI_BIM_WCKCFG 0x40015434 rw 1 2 Wrong clock configuration interrupt SAI_BSLOTR 0x40015430 -- -- 98 Reset:0x00000000 Address: 0x40015430 SAI_BSLOTR_FBOFF 0x40015430 rw 5 0 First bit offset SAI_BSLOTR_NBSLOT 0x40015430 rw 4 8 Number of slots in an audio frame SAI_BSLOTR_SLOTEN 0x40015430 rw 16 16 Slot enable SAI_BSLOTR_SLOTSZ 0x40015430 rw 2 6 Slot size SAI_BSR 0x40015438 -- -- 98 Reset:0x00000000 Address: 0x40015438 SAI_BSR_AFSDET 0x40015438 ro 1 5 Anticipated frame synchronization de SAI_BSR_CNRDY 0x40015438 ro 1 4 Codec not ready SAI_BSR_FLVL 0x40015438 ro 3 16 FIFO level threshold SAI_BSR_FREQ 0x40015438 ro 1 3 FIFO request SAI_BSR_LFSDET 0x40015438 ro 1 6 Late frame synchronization detection SAI_BSR_MUTEDET 0x40015438 ro 1 1 Mute detection SAI_BSR_OVRUDR 0x40015438 ro 1 0 Overrun / underrun SAI_BSR_WCKCFG 0x40015438 ro 1 2 Wrong clock configuration flag SAI_PDMCR 0x40015444 -- -- 98 Reset:0x00000000 Address: 0x40015444 SAI_PDMCR_CKEN1 0x40015444 rw 1 8 CKEN1 SAI_PDMCR_CKEN2 0x40015444 rw 1 9 CKEN2 SAI_PDMCR_CKEN3 0x40015444 rw 1 10 CKEN3 SAI_PDMCR_CKEN4 0x40015444 rw 1 11 CKEN4 SAI_PDMCR_MICNBR 0x40015444 rw 2 4 MICNBR SAI_PDMCR_PDMEN 0x40015444 rw 1 0 PDMEN SAI_PDMDLY 0x40015448 -- -- 98 Reset:0x00000000 Address: 0x40015448 SAI_PDMDLY_DLYM1L 0x40015448 rw 3 0 DLYM1L SAI_PDMDLY_DLYM1R 0x40015448 rw 3 4 DLYM1R SAI_PDMDLY_DLYM2L 0x40015448 rw 3 8 DLYM2L SAI_PDMDLY_DLYM2R 0x40015448 rw 3 12 DLYM2R SAI_PDMDLY_DLYM3L 0x40015448 rw 3 16 DLYM3L SAI_PDMDLY_DLYM3R 0x40015448 rw 3 20 DLYM3R SAI_PDMDLY_DLYM4L 0x40015448 rw 3 24 DLYM4L SAI_PDMDLY_DLYM4R 0x40015448 rw 3 28 DLYM4R