Plang For STM32f103C8¶
PLANG is my attempt at a ‘Peripheral LANGuage’ for STM32 Microcontrollers using Mecrisp-Stellaris.
The idea is that the programmer uses PLANG to easily search and find the peripheral Words needed when coding Forth on STM32.
Download¶
https://sourceforge.net/projects/mecrisp-stellaris-folkdoc/files/plang-v1-stm32f103.tar.gz/download is a 85KB tarball with the following contents:
.
├── STM32F103C8T6.memmap.fs
├── bitfields.db
├── mit-license.txt
├── plang
└── sqlite.readme.txt
Requirement¶
SQlite Database¶
No don’t click away, SQlite is a stupidly easy simple database, no server, no passwords etc, just run the executable :)
See https://www.sqlite.org/index.html for the SQLITE program
Learning Sqlite: https://www.sqlitetutorial.net/
Gui Viewers¶
CLI Examples¶
Sqlite has its own CLI viewer, nothing else is needed.
List the STM32F103C8 Peripherals in the Database¶
sqlite3 bitfields.db ".tables"
ADC1 CRC EXTI GPIOC IWDG RTC TIM1 USART1 WWDG
AFIO DBG FLASH GPIOD NVIC SDIO TIM2 USART2
BKP DMA1 GPIOA I2C1 PWR SPI1 TIM3 USART3
CAN DMA2 GPIOB I2C2 RCC SPI2 TIM4 USB
Find all Bitfields in the CRC Peripheral¶
sqlite3 bitfields.db ".mode column" ".headers on" ".width 25 22 20 6 9 9 40" "SELECT * FROM crc"
name stack word access bitwidth bitoffset description
------------------------- ---------------------- -------------------- ------ --------- --------- ----------------------------------------
CRC calculation unit - - - - - -
CRC_DR Reset Value $FFFFFFFF - - - - -
CRC_DR_DR<< ( %32 -- x ) rw 32 0 Data Register
CRC_IDR Reset Value $00000000 - - - - -
CRC_IDR_IDR<< ( %8 -- x ) rw 8 0 Independent Data register
CRC_CR Reset Value $00000000 - - - - -
CRC_CR_RESET! ( -- ) 1 CRC_CR bis! wo 1 0 Reset bit
Find all Bitfields in RTC where the access type is Read Only¶
sqlite3 bitfields.db ".mode column" ".headers on" ".width 25 22 20 6 8 9 40" "SELECT * FROM rtc WHERE access LIKE '%ro%'"
name stack word access bitwidth bitoffset description
------------------------- ---------------------- -------------------- ------ -------- --------- ----------------------------------------
RTC_CRL_RTOFF? ( -- 1|0 ) 1 5 lshift RTC_CRL ro 1 5 RTC operation OFF
RTC_DIVH_DIVH@ ( -- x ) 4 bitwidthmask 0 ls ro 4 0 RTC prescaler divider register high
RTC_DIVL_DIVL@ ( -- x ) 16 bitwidthmask 0 l ro 16 0 RTC prescaler divider register Low
See also
See also
See also