BLUEPILL STLINK V2 PROGRAMMER README¶
Make a Stlink V2 programmer/debugger for STM8/STM32 using a STM32F103 MCU
Sometimes one needs a SWD programmer/debugger for a project but a commercial ‘board’ such as a Discovery, Nucleo or $5 - $20 Chinese clone programmer isn’t available, so it can be handy to build your own or use a cheap spare Blue Pill type board to make one.
Copyright¶
Licensed under the MIT Copyright.
Installing STLINK on a STM32F103 MCU based board¶
Now referred to as The Board
Get the Stlink binary here: http://e.pavlin.si/wp-content/uploads/2016/02/STLinkV2.J16.S4.bin_.zip
Mini-arm Board¶
Electrically the same as bluepill but has a JTAG connector.
connect JTAG connector from mini-arm to Olimex Tiny-H JTAG dongle
plug Olimex Tiny-H USB cable into PC
run flash-STLinkV2.J16.S4.bin.sh (STLinkV2.J16.S4.bin)
Other boards with a STM32F103¶
Such as the Bluepill etc
Flash STLinkV2.J16.S4.bin to The Board using your normal flashing method.
After flashing STLinkV2.J16.S4.bin¶
reset board
“dmesg” should show “STMicroelectronics STM32 STLink at <whatever device>”
Warning
“st-info –probe” will FAIL because the firmware we flashed is obsolete, even tho it shows as a “STMicroelectronics STM32 STLink at <whatever device>” above. This is not a problem as we upgrade to the latest STLink firmware in the next step.
Upgrading to the latest STlinkV2¶
There are no binaries available for the latest StlinkV2, to upgrade from the obsolete binary that is available online, a Java based ‘updater’ program made by ST is required.
Install the STlink Java ‘Updater’¶
Get the following package, free STM account required : http://www.st.com/en/development-tools/stsw-link007.html
It’s Java and has packages for all the Linux distros, just follow the instructions
Run “java -jar STLinkUpgrade.jar” for the GUI updater
Plug The Board USB connector into your PC and run the Updater, it should fetch the latest firmware and flash it to The Board.
The Updater will show that the existing FW version is “V2.21.S4” and what it will be updated to, mine was “V2J37S7”
Reset board
“dmesg” should show “STMicroelectronics STM32 STLink at <whatever device>”
Note
The Updater WRITE PROTECTS the MCU, so the updated binary cannot be read and saved (to avoid all this Java based stuff). If the MCU is set to “unprotect” it just erases the Flash. That’s why there are no binaries floating around the Internet.
Run “st-info –probe”
With no MCU connected, just The Board (no external target MCU connected) running stlink-V2J37S7 should produce something like the following output:
st-info --probe
Found 1 stlink programmers
serial: 576b507151542723
openocd: "\x57\x6b\x50\x71\x51\x54\x27\x23"
flash: 0 (pagesize: 0)
sram: 0
chipid: 0x0000
descr: unknown device
The Board is now updated and thinks it’s a Stlink programmer/debugger running the latest firmware.
Connect the target MCU header board to the new Stlink¶
Green STM32F051 UFQFPN32 header board: https://mecrisp-stellaris-folkdoc.sourceforge.io/stm32-boards.html?highlight=green%20pill#why-not-make-your-own-green-pill
Note
You can use any STM32xxxx MCU here, just change the “Pins” list to suit.
Wiring¶
Five wires connect The Board to the target chip. Keep the wires as short as possible as SWD is very fast and long wires just won’t work. The usual short “Dupont Cables” will be fine.
STM32 Functions |
STM32F051 Pins |
Bluepill Target Board |
Bluepill Stlink Board |
Olimex P103 jtag |
Wire Colors I used |
|---|---|---|---|---|---|
GND |
Centre |
Gnd |
Gnd |
GND PIN |
Black |
SWCLK |
24 |
PA-14 |
PB-13 |
9 (TCK) |
White |
SWDIO |
23 |
PA-13 |
PB-14 <-connect to-> PB-12 |
7 (TMS) |
grey |
3.3V |
1,5,7 |
N/A |
3.3V (source) |
N/A |
Red |
N/A |
N/A |
5v |
5v |
VIN PIN |
Red |
NRST |
4 |
7 |
PB-0 |
RST PIN |
Yellow |
Testing that Stlink can “see” the target MCU is connected¶
% st-info --probe
Found 1 stlink programmers
serial: 576b507151542723
openocd: "\x57\x6b\x50\x71\x51\x54\x27\x23"
flash: 65536 (pagesize: 1024)
sram: 8192
chipid: 0x0440
descr: F0 device
Success!¶
Success!! the STlink sees the F0 Device connected !! compare this to the “st-info –probe” above with no MCU connected ?
The Board can now be used to flash target mcus using st-flash or )penOCD on the PC. IT can also be used to connect GBD via OpenOCD for debugging.
St-util¶
This is part of the st-link package and can be used to connect a GDB server to the Target
% ./st-util
st-util
2020-10-28T14:30:42 INFO common.c: F0xx: 8 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
2020-10-28T14:30:42 INFO gdb-server.c: Listening at *:4242...
OpenOCD¶
Openocd via SWD runs fine on the Target as well
xterm -e openocd -f interface/stlink-v2.cfg -f target/stm32f0x.cfg
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v37 API v2 SWIM v7 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 2.379186
Info : stm32f0x.cpu: hardware has 4 breakpoints, 2 watchpoints
Telnet Session into OpenOCD¶
xterm -e telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> flash probe 0
device id = 0x20006440
flash size = 64kbytes
flash 'stm32f1x' found at 0x08000000
>
GDB-TUI¶
GDB-TUI will connect to the target either via St-util or a Telnet Session into OpenOCD as above
xterm -geometry 115x70+1+1 -fs 10 -e arm-none-eabi-gdb -tui
┌──Register group: general────────────────────────────────────────────────────────────────────────────────────────┐
│r0 0xffffffff r1 0xffffffff r2 0xffffffff r3 0xffffffff │
│r4 0xffffffff r5 0xffffffff r6 0xffffffff r7 0xffffffff │
│r8 0xffffffff r9 0xffffffff r10 0xffffffff r11 0xffffffff │
│r12 0xffffffff sp 0x20000000 lr 0xffffffff pc 0x8 0x8 │
│xPSR 0xc1000000 │
│ │
│ │
│ │
│ │
│ │
│ │
│ │
│ │
┌──testblink.s─────────────────────────────────────────────────────────────────────────────────────────────────┐
│1 // Assembly language Blinky example for stm32f051 using a svd2as designed to be more readable, │
│2 // Requires svd2as │
│3 // Board: stm32f0 Discovery │
│4 // Blue led: GPIOC-8, green led: GPIOC-9, blink them together │
│5 // Copyright 25th November 2018 <terry@tjporter.com.au> Released under BSD License, see COPYING.TXT │
│6 │
│7 .cpu cortex-m0 // Tell the assembler what model of CortexM this is│
│8 .thumb // Cortex micros only understand thumb(2) code │
│9 .text // what follows is code │
│10 .include "gpio-equates.s" │
│11 .include "bitposn-equates.s" // a list of ".equ BIT0, 0x00000001", " etc │
│12 .include "STM32F0xx-tp1.equates.s" // Auto generated by svd2as │
│13 .syntax unified // use newer style instructions │
│14 Vector_Table: .word 0x20000000 // stack pointer value when stack is empty 0x200000│
│15 ResetVector: .word start + 1 // Reset Handler │
│16 │
│17 │
│18 │
B+>│19 start: ldr r1, = RCC_AHBENR // 0x40021014 │
│20 ldr r2, = AHBENR_IOPCEN // Enable GPIOC = 0x00080000 │
│21 str r2, [r1] │
│22 │
│23 ldr r1, = GPIOC_MODER // 0x48000800 │
│24 ldr r2, = GPIOC_MODER_CFG // Set GPIOC-8 and GPIOC-9 to output │
│25 str r2, [r1] │
│26 │
│27 main_loop: │
│28 leds_on: // Main loop │
│29 ldr r1, = GPIOC_BSRR // 0x48000818 │
│30 ldr r2, = LEDS_ON // Turn LEDS on = 0x00000100 + 0x00000200 = 0x300 │
│31 str r2, [r1] │
│32 bl delay │
│33 │
│34 leds_off: │
│35 ldr r1, = GPIOC_BSRR // 0x48000818 │
│36 ldr r2, = LEDS_OFF // Turn LED off = 0x01000000 + 0x02000000 = 0x3000000 │
│37 str r2, [r1] │
│38 bl delay │
│39 │
│40 b main_loop // branch main_loop │
│41 │
│42 │
└──────────────────────────────────────────────────────────────────────────────────────────────────────────────┘
remote Remote target In: start L19 PC: 0x8
Unable to match requested speed 1000 kHz, using 950 kHz
Unable to match requested speed 1000 kHz, using 950 kHz
adapter speed: 950 kHz
target halted due to debug-request, current mode: Thread
xPSR: 0xc1000000 pc: 0x00000008 msp: 0x20000000
(cortex-gdb)s
Single stepping until exit from function Vector_Table,
which has no line number information.
Breakpoint 1, start () at testblink.s:19
(cortex-gdb)
Working with Forth¶
Forth passed all tests, from running on the Target with a SWDCOM Console to uploading/compiling Source code.
Flashing Mecrisp-Stellaris to the Target¶
% make flash
/home/tp/projects/programming-languages/forth/mecrisp-stellaris/STM32F051K8-SWDCOM/swdcom/stlink/build/Release/bin/st-flash erase
st-flash 1.6.1-91-g14fc947
2020-10-26T19:40:38 INFO common.c: F0xx: 8 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
file mecrisp-stellaris/mecrisp-stellaris-stm32f051.bin md5 checksum: 8df4b69dd9abe0b630a3f732dd6f5e1c, stlink checksum: 0x001bf55f
2020-10-26T19:40:38 INFO common.c: Attempting to write 19892 (0x4db4) bytes to stm32 address: 134217728 (0x8000000)
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08000000 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08000400 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08000800 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08000c00 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08001000 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08001400 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08001800 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08001c00 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08002000 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08002400 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08002800 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08002c00 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08003000 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08003400 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08003800 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08003c00 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08004000 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08004400 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08004800 erased
2020-10-26T19:40:38 INFO common.c: Flash page at addr: 0x08004c00 erased
2020-10-26T19:40:38 INFO common.c: Finished erasing 20 pages of 1024 (0x400) bytes
2020-10-26T19:40:38 INFO common.c: Starting Flash write for VL/F0/F3/F1_XL core id
2020-10-26T19:40:38 INFO flash_loader.c: Successfully loaded flash loader in sram 20/20 pages written
2020-10-26T19:40:39 INFO common.c: Starting verification of write complete
2020-10-26T19:40:39 INFO common.c: Flash written and verified! jolly good!
/home/tp/projects/programming-languages/forth/mecrisp-stellaris/STM32F051K8-SWDCOM/swdcom/stlink/build/Release/bin/st-flash reset
st-flash 1.6.1-91-g14fc947
2020-10-26T19:40:39 INFO common.c: F0xx: 8 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
A SWDCOM Mecrisp-Stellaris Console¶
https://mecrisp-stellaris-folkdoc.sourceforge.io/swdcom.html#swdcom
Note
Swdcom allows the PC to form a Virtual Interactive Console with the Forth OS now running on the MCU via the exact same wiring used in this project to flash the chip. Nothing has been changed.
make term
Mecrisp-Stellaris RA 2.5.4 with M0 core for STM32F051 by Matthias Koch
ok.
ok.
Upload/compile 8 Mhz Clock Library Files¶
https://sourceforge.net/projects/mecrisp-stellaris-folkdoc/files/swdcom-demo-f051-6773.zip
Swdcom also allows the high speed source upload/compile cycle over the exact same wiring, while watching it on the Virtual Interactive Console above.
make 8mhz-lib
compiletoflash
: bit ( u -- u ) 1 swap lshift 1-foldable ;
$E000E010 constant stk_csr
$E000E014 constant stk_rvr
$E000E018 constant stk_cvr
$E000E01C constant stk_calib
0 variable ticktime
: tickint ( -- )
%010 stk_csr bis!
;
: systick-handler ( -- )
1 ticktime +!
;
--- lots of sourcecode
---
---
compiletoflash
cornerstone ~~~project~~~
compiletoram
uptest
---------------------------
Library Upload Speed Stats:
---------------------------
Stats for the last 'make lib' source upload
Number of uploaded Words: 319
Source upload time : 33,69 seconds
Source upload/compile rate: 9,4 Words per second (at 8 MHz clock)
Hardware: STM32F051
Upload method: SWD2 <https://github.com/Crest/swdcom>
Memstats¶
free
Memory stats in bytes:
Flash Total:65536 Used:59392 Free:6144
Ram Total:8192 Used:1620 Free:6572
RCC_CR pretty print¶
https://mecrisp-stellaris-folkdoc.sourceforge.io/register-generator.html#svd2forth
Showing the 8MHz internal RC clock is running
RCC_CR. $00004E83
P H H
L P C S S H H
L L S E E S S H
R L S B R E I S
D O O Y D O| HSICAL | | R I
Y N N P Y N|7:6:5:4:3:2:1:0| HSITRIM | D O
|2|2| |1|1|1|1|1|1|1|1|1|1| | |4:3:2:1:0| Y N
~|~|~|~|~|~|5|4|~|~|~|~|9|8|7|6|5|4|3|2|1|0|9|8|7|6|5|4|3|~|1|0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 1 0 0 0 0 0 1 1
Words4¶
Lists all the Forth programs on the MCU.
words4
--- Mecrisp-Stellaris RA 2.5.4 ---
2dup 2drop 2swap 2nip
2over 2tuck 2rot 2-rot
2>r 2r> 2r@ 2rdrop
d2/ d2* dshr dshl
dabs dnegate d- d+
s>d um* m* ud*
udm* */ */mod u*/
u*/mod um/mod m/mod ud/mod
d/mod d/ f* f/
2! 2@ du< du>
d< d> d0< d0=
d<> d= sp@ sp!
rp@ rp! dup drop
?dup swap nip over
tuck rot -rot pick
depth rdepth >r r>
r@ rdrop rpick roll
-roll and bic or
xor * clz ror
rol arshift rshift lshift
0= 0<> 0< true
false >= <= <
> u>= u<= u<
u> <> = min
max umax umin move
fill @ ! +!
h@ h! h+! c@
c! c+! bis! bic!
xor! bit@ hbis! hbic!
hxor! hbit@ cbis! cbic!
cxor! cbit@ hflash! flashpageerase
eraseflash eraseflashfrom + -
1- 1+ 2- 2+
cell+ negate not shr
shl 2* cells 2/
abs u/mod /mod mod
/ even base binary
decimal hex swd swd-init
swd-key? swd-emit? swd-key swd-emit
hook-emit hook-key hook-emit? hook-key?
hook-pause emit key emit?
key? pause cexpect accept
tib >in current-source setsource
source query compare cr
bl space spaces [char]
char ( \ ."
c" s" count ctype
type hex. h.s u.s
.s words unused registerliteral,
call, literal, create does>
<builds ['] ' postpone
inline, ret, exit recurse
state ] [ :
; execute immediate inline
compileonly 0-foldable 1-foldable 2-foldable
3-foldable 4-foldable 5-foldable 6-foldable
7-foldable constant 2constant smudge
setflags aligned align h,
, ><, string, allot
forgetram compiletoram? compiletoram compiletoflash
(create) variable 2variable nvariable
buffer: dictionarystart dictionarynext skipstring
find hook-find (find) cjump,
jump, here flashvar-here then
else if ahead repeat
while until again begin
k j i leave
unloop +loop loop do
?do case ?of of
endof endcase token parse
digit number .digit hold
hold< sign #> f#S
f# #S # <#
f. f.n ud. d.
u. . evaluate interpret
hook-quit quit eint? eint
dint ipsr nop unhandled
reset irq-systick irq-fault irq-collection
irq-exti0_1 irq-exti2_3 irq-exti4_15 irq-tsc
irq-dma_ch1 irq-dma_ch2_3 irq-dma_ch4_5 irq-adc
irq-tim1_up irq-tim1_cc irq-tim2 irq-tim3
irq-tim6_dac irq-tim14 irq-tim15 irq-tim16
irq-tim17 irq-i2c1 irq-i2c2 irq-spi1
irq-spi2 irq-usart1 irq-usart2 irq-cec_can
--- Flash Dictionary ---
bit stk_csr stk_rvr stk_cvr
stk_calib ticktime tickint systick-handler
init.systick ticktime. zero-ticktime ms.delay
defcount old-words new-words tot-words
timestamp uptest u.1 u.2
u.3 u.4 u.8 h.1
h.2 h.3 h.4 h.8
hex.1 hex.2 hex.3 hex.4
u.ns const. addr. .decimal
b8loop. b16loop. b16loop-a. b32loop.
b32sloop. 1b. 2b. 4bl.
4bh. 16b. bin. bin1.
bin2. bin4. bin4l. bin4h.
bin16. kill SCB_CPUID SCB_ICSR
SCB_AIRCR SCB_SCR SCB_CCR SCB_SHPR2
SCB_SHPR3 SCB_CPUID.. SCB_CPUID. SCB_ICSR..
SCB_ICSR. SCB_AIRCR.. SCB_AIRCR. SCB_SCR..
SCB_SCR. SCB_CCR.. SCB_CCR. SCB_SHPR2..
SCB_SHPR2. SCB_SHPR3.. SCB_SHPR3. SCB.
closest-located traceinside. calltrace calltrace-handler
init.calltrace cornerstone TEMPLATE TEMPLATE..
TEMPLATE. COMP_CSR.. RCC_CR.. RCC_CFGR..
RCC_AHBENR.. RCC_APB2ENR.. RCC_APB1ENR.. RCC_CSR..
RCC_CFGR2.. RCC_CFGR3.. RCC_CR2.. TSC_CR..
INPUT OUTPUT AF ANALOG
AF0 AF1 AF2 AF3
AF4 AF5 AF6 AF7
PUSH-PULL OPEN-DRAIN pull-up pull-down
words4 flashfree ramfree flashfree.
ramfree. memstats free WRITEONLY
GPIOC GPIOC_MODER GPIOC_OTYPER GPIOC_OSPEEDR
GPIOC_PUPDR GPIOC_IDR GPIOC_ODR GPIOC_BSRR
GPIOC_LCKR GPIOC_AFRL GPIOC_AFRH GPIOC_BRR
GPIOC_MODER. GPIOC_OTYPER. GPIOC_OSPEEDR. GPIOC_PUPDR.
GPIOC_IDR. GPIOC_ODR. GPIOC_BSRR. GPIOC_LCKR.
GPIOC_AFRL. GPIOC_AFRH. GPIOC_BRR. GPIOC.
GPIOB GPIOB_MODER GPIOB_OTYPER GPIOB_OSPEEDR
GPIOB_PUPDR GPIOB_IDR GPIOB_ODR GPIOB_BSRR
GPIOB_LCKR GPIOB_AFRL GPIOB_AFRH GPIOB_BRR
GPIOB_MODER. GPIOB_OTYPER. GPIOB_OSPEEDR. GPIOB_PUPDR.
GPIOB_IDR. GPIOB_ODR. GPIOB_BSRR. GPIOB_LCKR.
GPIOB_AFRL. GPIOB_AFRH. GPIOB_BRR. GPIOB.
GPIOA GPIOA_MODER GPIOA_OTYPER GPIOA_OSPEEDR
GPIOA_PUPDR GPIOA_IDR GPIOA_ODR GPIOA_BSRR
GPIOA_LCKR GPIOA_AFRL GPIOA_AFRH GPIOA_BRR
GPIOA_MODER. GPIOA_OTYPER. GPIOA_OSPEEDR. GPIOA_PUPDR.
GPIOA_IDR. GPIOA_ODR. GPIOA_BSRR. GPIOA_LCKR.
GPIOA_AFRL. GPIOA_AFRH. GPIOA_BRR. GPIOA.
EXTI EXTI_IMR EXTI_EMR EXTI_RTSR
EXTI_FTSR EXTI_SWIER EXTI_PR EXTI_IMR.
EXTI_EMR. EXTI_RTSR. EXTI_FTSR. EXTI_SWIER.
EXTI_PR. EXTI. NVIC NVIC_ISER
NVIC_ICER NVIC_ISPR NVIC_ICPR NVIC_IPR0
NVIC_IPR1 NVIC_IPR2 NVIC_IPR3 NVIC_IPR4
NVIC_IPR5 NVIC_IPR6 NVIC_IPR7 NVIC_ISER.
NVIC_ICER. NVIC_ISPR. NVIC_ICPR. NVIC_IPR0.
NVIC_IPR1. NVIC_IPR2. NVIC_IPR3. NVIC_IPR4.
NVIC_IPR5. NVIC_IPR6. NVIC_IPR7. NVIC.
RCC RCC_CR RCC_CFGR RCC_CIR
RCC_APB2RSTR RCC_APB1RSTR RCC_AHBENR RCC_APB2ENR
RCC_APB1ENR RCC_BDCR RCC_CSR RCC_AHBRSTR
RCC_CFGR2 RCC_CFGR3 RCC_CR2 RCC_CR.
RCC_CFGR. RCC_CIR. RCC_APB2RSTR. RCC_APB1RSTR.
RCC_AHBENR. RCC_APB2ENR. RCC_APB1ENR. RCC_BDCR.
RCC_CSR. RCC_AHBRSTR. RCC_CFGR2. RCC_CFGR3.
RCC_CR2. RCC. SYSCFG SYSCFG_CFGR1
SYSCFG_EXTICR1 SYSCFG_EXTICR2 SYSCFG_EXTICR3 SYSCFG_EXTICR4
SYSCFG_CFGR2 SYSCFG_CFGR1. SYSCFG_EXTICR1. SYSCFG_EXTICR2.
SYSCFG_EXTICR3. SYSCFG_EXTICR4. SYSCFG_CFGR2. SYSCFG.
Flash Flash_ACR Flash_KEYR Flash_OPTKEYR
Flash_SR Flash_CR Flash_AR Flash_OBR
Flash_WRPR Flash_ACR. Flash_KEYR. Flash_OPTKEYR.
Flash_SR. Flash_CR. Flash_AR. Flash_OBR.
Flash_WRPR. Flash. RCC_AHBENR_IOPCEN GPIOC_MODER_MODER8
GPIOC_MODER_MODER9 GPIOC_BSRR_BS9 GPIOC_BSRR_BR9 GPIOC_BSRR_BS8
GPIOC_BSRR_BR8 greenon greenoff blueon
blueoff leds.init word.start word.end
disasm-$ disasm-fetch disasm-string name.
register. opcode? reg. reg16.
reg16split. registerlist. imm3. imm5.
imm8. imm3<<1. imm5<<1. imm8<<1.
imm3<<2. imm5<<2. imm7<<2. imm8<<2.
destination-r0 disasm memstamp disasm-step
seec see dump16 dump
~~~project~~~ ok.
